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120 GNU make

deﬁnes a rule that can make any ﬁle x.o from x.c. The recipe uses the automatic variables

‘$@’ and ‘$<’ to substitute the names of the target ﬁle and the source ﬁle in each case where

the rule applies (see Section 10.5.3 [Automatic Variables], page 120).

Here is a second built-in rule:

% :: RCS/%,v

$(CO) $(COFLAGS) $<

deﬁnes a rule that can make any ﬁle x whatsoever from a corresponding ﬁle x,v in the sub-

directory RCS. Since the target is ‘%’, this rule will apply to any ﬁle whatever, provided the

appropriate prerequisite ﬁle exists. The double colon makes the rule terminal, which means

that its prerequisite may not be an intermediate ﬁle (see Section 10.5.5 [Match-Anything

Pattern Rules], page 123).

This pattern rule has two targets:

%.tab.c %.tab.h: %.y

bison -d $<

This tells make that the recipe ‘bison -d x.y’ will make both x.tab.c and x.tab.h. If

the ﬁle foo depends on the ﬁles parse.tab.o and scan.o and the ﬁle scan.o depends

on the ﬁle parse.tab.h, when parse.y is changed, the recipe ‘bison -d parse.y’ will be

executed only once, and the prerequisites of both parse.tab.o and scan.o will be satisﬁed.

(Presumably the ﬁle parse.tab.o will be recompiled from parse.tab.c and the ﬁle scan.o

from scan.c, while foo is linked from parse.tab.o, scan.o, and its other prerequisites,

and it will execute happily ever after.)

10.5.3 Automatic Variables

Suppose you are writing a pattern rule to compile a ‘.c’ ﬁle into a ‘.o’ ﬁle: how do you

write the ‘cc’ command so that it operates on the right source ﬁle name? You cannot write

the name in the recipe, because the name is diﬀerent each time the implicit rule is applied.

What you do is use a special feature of make, the automatic variables. These variables

have values computed afresh for each rule that is executed, based on the target and prereq-

uisites of the rule. In this example, you would use ‘$@’ for the object ﬁle name and ‘$<’ for

the source ﬁle name.

It’s very important that you recognize the limited scope in which automatic variable

values are available: they only have values within the recipe. In particular, you cannot use

them anywhere within the target list of a rule; they have no value there and will expand

to the empty string. Also, they cannot be accessed directly within the prerequisite list

of a rule. A common mistake is attempting to use $@ within the prerequisites list; this

will not work. However, there is a special feature of GNU make, secondary expansion (see

Section 3.8 [Secondary Expansion], page 18), which will allow automatic variable values to

be used in prerequisite lists.

Here is a table of automatic variables:

$@ The ﬁle name of the target of the rule. If the target is an archive member, then

‘$@’ is the name of the archive ﬁle. In a pattern rule that has multiple targets

(see Section 10.5.1 [Introduction to Pattern Rules], page 119), ‘$@’ is the name

of whichever target caused the rule’s recipe to be run.

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