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Chapter 2: An Introduction to Makeﬁles 7

objects = main.o kbd.o command.o display.o \

insert.o search.o files.o utils.o

edit : $(objects)

cc -o edit $(objects)

main.o : main.c defs.h

cc -c main.c

kbd.o : kbd.c defs.h command.h

cc -c kbd.c

command.o : command.c defs.h command.h

cc -c command.c

display.o : display.c defs.h buffer.h

cc -c display.c

insert.o : insert.c defs.h buffer.h

cc -c insert.c

search.o : search.c defs.h buffer.h

cc -c search.c

files.o : files.c defs.h buffer.h command.h

cc -c files.c

utils.o : utils.c defs.h

cc -c utils.c

clean :

rm edit $(objects)

2.5 Letting make Deduce the Recipes

It is not necessary to spell out the recipes for compiling the individual C source ﬁles,

because make can ﬁgure them out: it has an implicit rule for updating a ‘.o’ ﬁle from

a correspondingly named ‘.c’ ﬁle using a ‘cc -c’ command. For example, it will use the

recipe ‘cc -c main.c -o main.o’ to compile main.c into main.o. We can therefore omit the

recipes from the rules for the object ﬁles. See Chapter 10 [Using Implicit Rules], page 111.

When a ‘.c’ ﬁle is used automatically in this way, it is also automatically added to the

list of prerequisites. We can therefore omit the ‘.c’ ﬁles from the prerequisites, provided

we omit the recipe.

Here is the entire example, with both of these changes, and a variable objects as

suggested above:

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 211 212

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Roland Ver. 4.5 Información técnica Pagina 17