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Chapter 3: Writing Makeﬁles 11

3 Writing Makeﬁles

The information that tells make how to recompile a system comes from reading a data base

called the makeﬁle.

3.1 What Makeﬁles Contain

Makeﬁles contain ﬁve kinds of things: explicit rules, implicit rules, variable deﬁnitions,

directives, and comments. Rules, variables, and directives are described at length in later

chapters.

• An explicit rule says when and how to remake one or more ﬁles, called the rule’s targets.

It lists the other ﬁles that the targets depend on, called the prerequisites of the target,

and may also give a recipe to use to create or update the targets. See Chapter 4

[Writing Rules], page 21.

• An implicit rule says when and how to remake a class of ﬁles based on their names.

It describes how a target may depend on a ﬁle with a name similar to the target and

gives a recipe to create or update such a target. See

Chapter 10 [Using Implicit Rules],

page 111.

• A variable deﬁnition is a line that speciﬁes a text string value for a variable that

can be substituted into the text later. The simple makeﬁle example shows a variable

deﬁnition for objects as a list of all object ﬁles (see Section 2.4 [Variables Make

Makeﬁles Simpler], page 6).

• A directive is an instruction for make to do something special while reading the makeﬁle.

These include:

• Reading another makeﬁle (see Section 3.3 [Including Other Makeﬁles], page 13).

• Deciding (based on the values of variables) whether to use or ignore a part of the

makeﬁle (see Chapter 7 [Conditional Parts of Makeﬁles], page 77).

• Deﬁning a variable from a verbatim string containing multiple lines (see Section 6.8

[Deﬁning Multi-Line Variables], page 69).

• ‘#’ in a line of a makeﬁle starts a comment. It and the rest of the line are ignored,

except that a trailing backslash not escaped by another backslash will continue the

comment across multiple lines. A line containing just a comment (with perhaps spaces

before it) is eﬀectively blank, and is ignored. If you want a literal #, escape it with a

backslash (e.g., \#). Comments may appear on any line in the makeﬁle, although they

are treated specially in certain situations.

You cannot use comments within variable references or function calls: any instance

of # will be treated literally (rather than as the start of a comment) inside a variable

reference or function call.

Comments within a recipe are passed to the shell, just as with any other recipe text.

The shell decides how to interpret it: whether or not this is a comment is up to the

shell.

Within a define directive, comments are not ignored during the deﬁnition of the

variable, but rather kept intact in the value of the variable. When the variable is

expanded they will either be treated as make comments or as recipe text, depending

on the context in which the variable is evaluated.

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